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DAVID FITRIO
Research Fellow BEng Hons (Comp.Eng, SKom) University of Bina Nusantara, Indonesia Email:david.fitrio@sync.monash.edu.au RESEARCH INTERESTSMy research interests are the modelling, simulation, and optimisation of very large scale integrated (VLSI) circuits. The breadth of my engineering background and my foundation in electronic engineering has allowed me to pursue research topics across several areas, such as ASIC power management, Radio Frequency (RF)/telecommunications and recently the detector ASIC. My research field in power management for ASIC resulted in various analysis and circuit implementations of voltage supply scaling and leakage current reduction techniques to address the current issues in dynamic and static power dissipation. The current research involves in the implementation of an ASIC X-ray detector of a new material at the Monash Centre for Synchrotron Science. SELECTED PUBLICATIONSD.Fitrio, J.Singh, A.Stojcevski, "Dynamic Voltage Scaling for Power Aware Fast Fourier (FFT) Transform", Lecture Notes on Computer Science, Springer-Verlag ACSAC, pp. 52-64, 2005. D.Fitrio, J.Singh, A.Stojcevski, "Ultra Low Power Weak Inversion Current Steered Digital to Analog Converter", 2006 IEEE Asia Pacific Conference on Circuits and Systems. Ed(s). Y P Yang. IEEE,1545-1548. D.Fitrio, J.Singh, A.Stojcevski, "Energy Efficient Low Power Shared-Memory Fast Fourier Transform (FFT) Processor with Dynamic Voltage Scaling", SPIE International Symposium on Microelectronics Vol. 6035, pp.69-79, 2006. D.Fitrio, J.Singh, A.Stojcevski, "Dynamic Voltage Scaling Implementation for Power Management", IFIP WG 10.5 Conference on VLSI-SOC, pp.459-464, 2005. D.Fitrio, A. Stojcevski, J. Singh, "Subthreshold Leakage Current Reduction Techniques for Static RAM", SPIE International Symposium on Smart Materials, Nano and Micro-Smart Systems, Vol. 5649. pp. 673-683, 2004. |